There are many applications in which the accurate measurement of a time interval is useful. For example, accurate time interval measurement is often used in various measurement and instrumentation applications, in analog-to-digital converters based on pulse-width modulation, in digital phase-locked loops, and in mass spectrometer time-of-flight measurements. It is also expected to that being able to accurately measure a time interval will become important in future technologies, such as for the operation of digitally-assisted radio frequency circuits, and also as data rates in general become faster.
Time interval measurements are typically performed between two trigger events (a start event and an end event). Conventionally, the time difference between trigger events has been measured by referring to a clock signal having a known frequency. The detection time of one or both trigger events is rounded to the nearest clock cycle. The number of clock cycles occurring between the trigger events is counted, and with this count plus the known clock frequency, the time interval can be determined. However, this clock-based method results in a rough time measurement having an error that depends upon the clock frequency.
For large time intervals, the error may be reduced to an acceptable level by increasing the reference clock frequency. But for small time intervals, the reference clock frequency would need to be impractically large. Hence, a time-to-digital converter (TDC) is often used to quantize the measurement error at the beginning and end of the time interval. The results of the TDC measurements are added to or subtracted from the rough time measurement to produce a more accurate time measurement.
There are various problems with this conventional TDC approach. For instance, the reference clock is susceptible to jitter, thereby reducing the accuracy of the measurements. Also, a high frequency clock consumes a relatively large amount of power, which is especially problematic where the circuitry for the clock exists solely for operating the TDC. In such a case, a complete phase-locked loop including a voltage-controlled oscillator is needed, further increasing the power penalty. Moreover, a dedicated TDC clock consumes precious real estate—typically a resource in short supply—when implemented on an integrated circuit.